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DSD
2003
IEEE
138views Hardware» more  DSD 2003»
15 years 9 months ago
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
Tang Lei, Shashi Kumar
CAINE
2007
15 years 5 months ago
A Novel Peak Detection Algorithm for Use in the Study of Machining Chip Segmentation
The study of how metal deforms and flows as parts are machined yields important insights into the metal cutting process. Improvements in high-speed digital imaging and image proce...
Eric Whitenton, Robert Ivester, Jarred Heigel
CSREAESA
2006
15 years 5 months ago
A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications
- This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...
Hong Yue, Kui Dai, Zhiying Wang
ENTCS
2008
83views more  ENTCS 2008»
15 years 4 months ago
Elastic Flow in an Application Specific Network-on-Chip
A Network-on-Chip (NoC) is increasingly needed to interconnect the large number and variety of Intellectual Property (IP) cells that make up a System-on-Chip (SoC). The network mu...
Daniel Gebhardt, Kenneth S. Stevens
TCBB
2010
96views more  TCBB 2010»
14 years 10 months ago
A Survey of Spatial Defects in Homo Sapiens Affymetrix GeneChips
Modern biology has moved from a science of individual measurements to a science where data are collected on an industrial scale. Foremost, among the new tools for biochemistry are ...
William B. Langdon, Graham J. G. Upton, Renata da ...