Abstract— In this paper, we discuss a real-time on-chip communication service with a priority-based wormhole switching policy. A novel off-line schedulability analysis approach i...
This paper introduces a cost-effective technique to deal with CMP coherence protocol requirements from the interconnection network point of view. A mechanism is presented to avoid...
In this paper, we introduce the use of slow-silent virtual channels to reduce the switching power of on-chip networks while keeping the leakage power small. Adding virtual channel...
In SoC designs, limited test access to internal cores, lowcost external tester’s lack of accuracy and slow frequencies make application of at-speed tests impractical. Therefore,...
Abstract— This paper reports the design of a high performance, adaptive low/high swing CMOS driver circuit (mj–driver) suitable for driving of global interconnects with large c...