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ISSS
1999
IEEE
126views Hardware» more  ISSS 1999»
15 years 8 months ago
Catalyst: A DSIP Design Flow Development in Industry
The Motorola System on Chip Design Technologies (SoCDT) team aims at providing a system design environment for its customers. The Toulouse branch concentrates on design efforts in...
W. De Rammelaere, K. Eckert, T. Lawell, R. McGarit...
DSD
2007
IEEE
116views Hardware» more  DSD 2007»
15 years 10 months ago
Evaluating the Model Accuracy in Automated Design Space Exploration
Design space exploration is used to shorten the design time of System-on-Chips (SoCs). The models used in the exploration need to be both accurate and fast to simulate. This paper...
Kalle Holma, Mikko Setälä, Erno Salminen...
DATE
2010
IEEE
146views Hardware» more  DATE 2010»
15 years 9 months ago
Leveraging application-level requirements in the design of a NoC for a 4G SoC - a case study
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...
Rudy Beraha, Isask'har Walter, Israel Cidon, Avino...
TCAD
2010
133views more  TCAD 2010»
14 years 10 months ago
Defect-Tolerant Design and Optimization of a Digital Microfluidic Biochip for Protein Crystallization
Protein crystallization is a commonly used technique for protein analysis and subsequent drug design. It predicts the 3-D arrangement of the constituent amino acids, which in turn ...
Tao Xu, Krishnendu Chakrabarty, Vamsee K. Pamula
ICCAD
2002
IEEE
146views Hardware» more  ICCAD 2002»
16 years 29 days ago
Test-model based hierarchical DFT synthesis
With increasing design sizes and adoption of System on a Chip (SoC) methodology, design synthesis and test automation tools are hitting capacity and performance bottlenecks. Curre...
Sanjay Ramnath, Frederic Neuveux, Mokhtar Hirech, ...