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DSD
2009
IEEE
105views Hardware» more  DSD 2009»
15 years 6 months ago
Design of a Highly Dependable Beamforming Chip
—As CMOS process technology advances towards 32nm, SoC complexity continuously grows but its dependability significantly decreases. In this paper, a beamforming chip 1 is designe...
Xiao Zhang, Hans G. Kerkhoff
ISCA
2006
IEEE
162views Hardware» more  ISCA 2006»
15 years 5 months ago
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
Feihui Li, Chrysostomos Nicopoulos, Thomas D. Rich...
FPL
2008
Springer
116views Hardware» more  FPL 2008»
15 years 1 months ago
NOC architecture design for multi-cluster chips
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...
IWSOC
2003
IEEE
117views Hardware» more  IWSOC 2003»
15 years 5 months ago
Design Considerations for Optically Connected Systems on Chip
This paper addresses some fundamental issues relating to the design of systems on chip that utilize optical interconnects. We present an information theoretical model for assessin...
Neal K. Bambha, Shuvra S. Bhattacharyya, Gary Euli...
ICCD
1992
IEEE
83views Hardware» more  ICCD 1992»
15 years 3 months ago
Logical Verification of the NVAX CPU Chip Design
ct Digital's NVAX high-performance microprocessor has a complex logical design. A rigorous simulation-based verification effort was undertaken to ensure that there were no log...
Walker Anderson