— In system-level design, the key to cope with the complexities involved with System-on-Chip (SOC) designs, is the reuse of Intellectual Property (IP). With the increasing demand...
A key problem that arises in System-on-a-Chip (SOC) designs of today is the Chip-level Clock Tree Synthesis (CCTS). CCTS is done by merging all the clock trees belonging to differ...
—Today, many chips are designed with predefined discrete cell libraries. In this paper we present a new fast gate sizing algorithm that works natively with discrete cell choices...
Airports for Agents1 (AA) is an implemented distributed multi-agent infrastructure designed for dynamic and unstable Internet environment. The infrastructure consists of platforms ...
Double-via placement is important for increasing chip manufacturing yield. Commercial tools and recent work have done a great job for it. However, they are found with a limited ca...