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FDL
2004
IEEE
15 years 3 months ago
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
Kari Tiensyrjä, Miroslav Cupák, Kostas...
ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
15 years 4 months ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...
GLVLSI
1999
IEEE
105views VLSI» more  GLVLSI 1999»
15 years 4 months ago
Area-Efficient Area Pad Design for High Pin-Count Chips
This paper presents an area pad layout method to e ciently reduce the space required for interconnection pads and pad drivers. Unlike peripheral pads, area pads use only the top m...
Louis Luh, John Choma Jr., Jeffrey T. Draper
ITNG
2007
IEEE
15 years 6 months ago
On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture
In this paper, we present several enhanced network techniques which are appropriate for VLSI implementation and have reduced complexity, high throughput, and simple routing algori...
Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh
HOTI
2008
IEEE
15 years 6 months ago
Design Exploration of Optical Interconnection Networks for Chip Multiprocessors
The Network-on-Chip (NoC) paradigm has emerged as a promising solution for providing connectivity among the increasing number of cores that get integrated into both systems-onchip...
Michele Petracca, Benjamin G. Lee, Keren Bergman, ...