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DSD
2006
IEEE
131views Hardware» more  DSD 2006»
15 years 3 months ago
Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
Christian Neeb, Norbert Wehn
ET
2006
98views more  ET 2006»
14 years 11 months ago
Accurate Whole-Chip Diagnostic Strategy for Scan Designs with Multiple Faults
1 Fault diagnosis of full-scan designs has been progressed significantly. However, most existing techniques are aimed at a logic block with a single fault. Strategies on top of the...
Yu-Chiun Lin, Shi-Yu Huang
ISQED
2007
IEEE
160views Hardware» more  ISQED 2007»
15 years 6 months ago
On-Chip Inductance in X Architecture Enabled Design
The inductance effects become significant for sub-100nm process designs due to increasing interconnect lengths, lower interconnect resistance values and fast signal transition tim...
Santosh Shah, Arani Sinha, Li Song, Narain D. Aror...
DAC
2007
ACM
16 years 24 days ago
Off-chip Decoupling Capacitor Allocation for Chip Package Co-Design
Off-chip decoupling capacitor (decap) allocation is a demanding task during package and chip codesign. Existing approaches can not handle large numbers of I/O counts and large num...
Hao Yu, Chunta Chu, Lei He
DSD
2005
IEEE
106views Hardware» more  DSD 2005»
15 years 5 months ago
SystemC-based Design Methodology for Reconfigurable System-on-Chip
Reconfigurable system is a promising alternative to deliver both flexibility and performance at the same time. New reconfigurable technologies and technologydependent tools have b...
Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen