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WMPI
2004
ACM
15 years 11 months ago
A low cost, multithreaded processing-in-memory system
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...
Jay B. Brockman, Shyamkumar Thoziyoor, Shannon K. ...
IWSOC
2003
IEEE
97views Hardware» more  IWSOC 2003»
15 years 11 months ago
Evaluating Template-Based Instruction Compression on Transport Triggered Architectures
In embedded systems, memory is one of the most expensive resources. Due to this, program code size has turned out to be one of the most critical design constraints. Code compressi...
Jari Heikkinen, Tommi Rantanen, Andrea G. M. Cilio...
ASPDAC
2000
ACM
108views Hardware» more  ASPDAC 2000»
15 years 10 months ago
System-in-package (SIP): challenges and opportunities
Abstract - In this paper, we propose the concept of System-InPackage (SIP) as a generalization of System-On-Chip (SOC). System-In-Package overcomes formidable integration barriers ...
King L. Tai
DAMON
2006
Springer
15 years 9 months ago
Realizing parallelism in database operations: insights from a massively multithreaded architecture
A new trend in processor design is increased on-chip support for multithreading in the form of both chip multiprocessors and simultaneous multithreading. Recent research in databa...
John Cieslewicz, Jonathan W. Berry, Bruce Hendrick...
VLSID
2000
IEEE
135views VLSI» more  VLSID 2000»
15 years 9 months ago
Performance and Functional Verification of Microprocessors
We address the problem of verifying the correctness of pre-silicon models of a microprocessor. We touch on the latest advances in this area by considering two different aspects of...
Pradip Bose, Jacob A. Abraham