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CLUSTER
2000
IEEE
15 years 10 months ago
Design and Performance of Maestro Cluster Network
Most clusters so far have used WAN or LAN-based network products for communication due to their market availability. However, they do not always match communication patterns in cl...
Shinichi Yamagiwa, Munehiro Fukuda, Koichi Wada
ASPDAC
2000
ACM
104views Hardware» more  ASPDAC 2000»
15 years 10 months ago
Design of digital neural cell scheduler for intelligent IB-ATM switch
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
J.-K. Lee, Seung-Min Lee, Mike Myung-Ok Lee, D.-W....
VLSID
2010
IEEE
173views VLSI» more  VLSID 2010»
15 years 10 months ago
Voltage-Frequency Planning for Thermal-Aware, Low-Power Design of Regular 3-D NoCs
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. ...
Mohammad Arjomand, Hamid Sarbazi-Azad
WCE
2007
15 years 7 months ago
An Implantable Retinal Stimulator Design for Long-term Animal Experiments
— this article reports on an electrical retinal stimulation system for use in long-term animal electrical stimulation experiments. The presented system consists of an implantable...
Jungai Zhou, Se Ik Park, J. M. Seo, Seung Woo Lee,...
TMM
2011
121views more  TMM 2011»
15 years 1 months ago
Spread Spectrum Visual Sensor Network Resource Management Using an End-to-End Cross-Layer Design
—In this paper, we propose an approach to manage network resources for a direct sequence code division multiple access (DS-CDMA) visual sensor network where nodes monitor scenes ...
Elizabeth S. Bentley, Lisimachos P. Kondi, John D....