Sciweavers

4394 search results - page 26 / 879
» Designing agent chips
Sort
View
VLSID
2005
IEEE
121views VLSI» more  VLSID 2005»
16 years 6 days ago
A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems
Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system compon...
Praveen Bhojwani, Rabi N. Mahapatra, Eun Jung Kim,...
DDECS
2007
IEEE
80views Hardware» more  DDECS 2007»
15 years 6 months ago
Design Platform for Quick Integration of an Internet Connectivity into System-on-Chips
— The paper describes pre-integrated subsystem consisting of a configurable 8-bit microcontroller and an Internet connection solution. The latter integrates Ethernet Media Access...
Bartosz Wojciechowski, Tomasz Kowalczyk, Wojciech ...
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
15 years 3 months ago
Communication Analysis for System-On-Chip Design
In this paper we present an approach for analysis of systems of parallel, communicating processes for SoC design. We present a method to detect communications that synchronize the...
Axel Siebenborn, Oliver Bringmann, Wolfgang Rosens...
CSB
2003
IEEE
15 years 5 months ago
Group Testing With DNA Chips: Generating Designs and Decoding Experiments
DNA microarrays are a valuable tool for massively parallel DNA-DNA hybridization experiments. Currently, most applications rely on the existence of sequence-specific oligonucleot...
Alexander Schliep, David C. Torney, Sven Rahmann
CISIS
2009
IEEE
15 years 6 months ago
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
Francisco Gilabert Villamón, Daniele Ludovi...