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DATE
2000
IEEE
61views Hardware» more  DATE 2000»
15 years 4 months ago
Efficient Power Co-Estimation Techniques for System-on-Chip Design
Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luc...
ICCAD
2000
IEEE
68views Hardware» more  ICCAD 2000»
15 years 4 months ago
Challenges in Physical Chip Design
Ralph H. J. M. Otten, Paul Stravers
ISCAS
1999
IEEE
94views Hardware» more  ISCAS 1999»
15 years 4 months ago
Designing system on a chip products using systems engineering tools
Systems engineering is the process which takes requirements specifications and engineers products and product families which involve hardware, software and possibly mechanical sub...
Graham R. Hellestrand
ASPDAC
1998
ACM
96views Hardware» more  ASPDAC 1998»
15 years 4 months ago
A Low Power 2-D DCT Chip Design Using Direct 2-D Algorithm
Liang-Gee Chen, Juing-Ying Jiu, Hao-Chieh Chang, Y...
ISCA
1997
IEEE
103views Hardware» more  ISCA 1997»
15 years 4 months ago
Designing High Bandwidth On-Chip Caches
In this paper we evaluate the performance of high bandwidth caches that employ multiple ports, multiple cycle hit times, on-chip DRAM, and a line buffer to find the organization t...
Kenneth M. Wilson, Kunle Olukotun