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DAC
2009
ACM
16 years 25 days ago
The day Sherlock Holmes decided to do EDA
Semiconductor design companies are in a continuous search for design tools that address the ever increasing chip design complexity coupled with strict time-to-market schedules and...
Andreas G. Veneris, Sean Safarpour
TKDE
2008
123views more  TKDE 2008»
14 years 11 months ago
DiSC: Benchmarking Secure Chip DBMS
Secure chips, e.g., present in smart cards, USB dongles, i-buttons, are now ubiquitous in applications with strong security requirements. Moreover, they require embedded data manag...
Nicolas Anciaux, Luc Bouganim, Philippe Pucheral, ...
COMPUTER
2002
129views more  COMPUTER 2002»
14 years 11 months ago
Networks on Chips: A New SoC Paradigm
of abstraction and coarse granularity and distributed communication control. Focusing on using probabilistic metrics such as average values or variance to quantify design objective...
Luca Benini, Giovanni De Micheli
ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
15 years 6 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...