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DELTA
2002
IEEE
15 years 4 months ago
Teaching Integrated Circuit and Semiconductor Device Design in New Zealand: The University of Canterbury Approach
Teaching the practical aspects of device and chip design in New Zealand presents many problems, including high manufacturing costs, long lead times, and the lack of local industry...
Richard J. Blaikie, Maan M. Alkaisi, Steven M. Dur...
DAC
2000
ACM
16 years 25 days ago
Self-test methodology for at-speed test of crosstalk in chip interconnects
The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
Xiaoliang Bai, Sujit Dey, Janusz Rajski
DATE
2002
IEEE
144views Hardware» more  DATE 2002»
15 years 4 months ago
Design Automation for Deepsubmicron: Present and Future
Advancing technology drives design technology and thus design automation EDA. How to model interconnect, how to handle degradation of signal integrity and increasing power densi...
Ralph H. J. M. Otten, Raul Camposano, Patrick Groe...
CODES
2006
IEEE
15 years 6 months ago
Layout aware design of mesh based NoC architectures
Design of System-on-Chip (SoC) with regular mesh based Network-on-Chip (NoC) consists of mapping processing cores to routers, and routing of the traffic traces on the topology suc...
Krishnan Srinivasan, Karam S. Chatha
CODES
2005
IEEE
15 years 5 months ago
Key research problems in NoC design: a holistic perspective
Networks-on-Chip (NoCs) have been recently proposed as a promising solution to complex on-chip communication problems. The lack of an unified representation of applications and ar...
Ümit Y. Ogras, Jingcao Hu, Radu Marculescu