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IMS
2000
123views Hardware» more  IMS 2000»
15 years 3 months ago
Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler
Many architectural ideas that appear to be useful from a hardware standpoint fail to achieve wide acceptance due to lack of compiler support. In this paper we explore the design of...
David Judd, Katherine A. Yelick, Christoforos E. K...
ACSD
2006
IEEE
102views Hardware» more  ACSD 2006»
15 years 1 months ago
Models of Computation for Networks on Chip
Networks on chip platforms offer the opportunity to introduce a new abstraction level that defines a set of platform services with performance and power characteristics. By making...
Axel Jantsch
DSD
2010
IEEE
221views Hardware» more  DSD 2010»
14 years 10 months ago
Modeling Reconfigurable Systems-on-Chips with UML MARTE Profile: An Exploratory Analysis
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jea...
ASPDAC
2006
ACM
82views Hardware» more  ASPDAC 2006»
15 years 3 months ago
Discovering the input assumptions in specification refinement coverage
The design of a large chip is typically hierarchical
Prasenjit Basu, Sayantan Das, Pallab Dasgupta, Par...
ISCAS
2003
IEEE
144views Hardware» more  ISCAS 2003»
15 years 5 months ago
A flexible global readout architecture for an analogue SIMD vision chip
A new vision chip, SCAMP-2, has been developed in a 0.35µm CMOS technology. In this paper, the design of the chip is presented, with particular emphasis on its readout architectu...
Piotr Dudek