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CODES
2007
IEEE
16 years 15 days ago
A code-generator generator for multi-output instructions
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Hanno Scharwächter, Jonghee M. Youn, Rainer L...
ISVLSI
2007
IEEE
150views VLSI» more  ISVLSI 2007»
16 years 13 days ago
Minimum-Congestion Placement for Y-interconnects: Some studies and observations
— Y -interconnects for VLSI chips are based on the use of global and semi-global wiring in only 0◦ , 60◦ , and 120◦ . Though X-interconnects are fast replacing the traditio...
Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Pa...
175
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HIPC
2007
Springer
16 years 9 days ago
FFTC: Fastest Fourier Transform for the IBM Cell Broadband Engine
The Fast Fourier Transform (FFT) is of primary importance and a fundamental kernel in many computationally intensive scientific applications. In this paper we investigate its perf...
David A. Bader, Virat Agarwal
ISCAS
2006
IEEE
121views Hardware» more  ISCAS 2006»
16 years 5 days ago
Microelectromechanical systems in 3D SOI-CMOS: sensing electronics embedded in mechanical structures
— We discuss the design of CMOS MEMS in a 3D SOI-CMOS technology. We present layout architectures, preliminary mechanics modeling using finite element analysis and release proce...
Francisco Tejada, Andreas G. Andreou
ISPD
2005
ACM
130views Hardware» more  ISPD 2005»
15 years 11 months ago
Improved algorithms for link-based non-tree clock networks for skew variability reduction
In the nanometer VLSI technology, the variation effects like manufacturing variation, power supply noise, temperature etc. become very significant. As one of the most vital nets...
Anand Rajaram, David Z. Pan, Jiang Hu