4394 search results - page 79 / 879 » Designing agent chips |
ICS
2009
Tsinghua U.
15 years 6 months ago
2009
Tsinghua U.
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
ISLPED
2005
ACM
15 years 5 months ago
2005
ACM
Designers are moving toward chip-multiprocessors (CMPs) to leverage application parallelism for higher performance while keeping design complexity under control. However, to date,...
113
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ISPD
1998
ACM
15 years 4 months ago
1998
ACM
As chip size and design density increase, coupling effects (crosstalk) between signal wires become increasingly critical to on–chip timing and even functionality. A method is pr...
105
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ICCSA
2007
Springer
15 years 3 months ago
2007
Springer
Network-on-Chip (NoC) has been proposed as an attractive alternative to traditional dedicated busses in order to achieve modularity and high performance in the future System-on-Chi...
ASAP
2007
IEEE
15 years 1 months ago
2007
IEEE
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...