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106
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MEMICS
2010
14 years 6 months ago
2010
Abstract. Increasing integration densities and the emergence of nanotechnology cause issues related to reliability and power consumption to become dominant factors for the design o...
148
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ICCD
2011
IEEE
13 years 11 months ago
2011
IEEE
—A key challenge in chip multiprocessor (CMP) design is to optimize the performance within a power budget limited by the CMP’s cooling, packaging, and power supply capacities. ...
112
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TC
2010
14 years 10 months ago
2010
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
CODES
2006
IEEE
15 years 6 months ago
2006
IEEE
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
ASPLOS
2008
ACM
15 years 1 months ago
2008
ACM
Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as th...