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125
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EUROPAR
2010
Springer
15 years 3 months ago
Power-Efficient Spilling Techniques for Chip Multiprocessors
Abstract. Current trends in CMPs indicate that the core count will increase in the near future. One of the main performance limiters of these forthcoming microarchitectures is the ...
Enric Herrero, José González, Ramon ...
152
Voted
AI
2010
Springer
15 years 3 months ago
Soft arc consistency revisited
The Valued Constraint Satisfaction Problem (VCSP) is a generic optimization problem defined by a network of local cost functions defined over discrete variables. It has applicatio...
Martin C. Cooper, Simon de Givry, M. Sanchez, Thom...
129
Voted
ICCAD
2005
IEEE
147views Hardware» more  ICCAD 2005»
16 years 14 days ago
NoCEE: energy macro-model extraction methodology for network on chip routers
In this paper we present NoCEE, a fast and accurate method for extracting energy models for packet-switched Network on Chip (NoC) routers. Linear regression is used to model the r...
Jeremy Chan, Sri Parameswaran
120
Voted
ICPR
2008
IEEE
16 years 4 months ago
Simultaneous multi-modal registration of multiple images based on multi-dimensional joint phase moment distributions
In this paper, a novel method for simultaneously registering multiple images acquired from different imaging modalities is presented. The optimal alignment is computed as the set ...
Alexander Wong
100
Voted
ASPDAC
2001
ACM
83views Hardware» more  ASPDAC 2001»
15 years 7 months ago
Trace-driven system-level power evaluation of system-on-a-chip peripheral cores
Our earlier work for fast evaluation of power consumption of general cores in a system-on-a-chip described techniques that involved isolating high-level instructions of a core, me...
Tony Givargis, Frank Vahid, Jörg Henkel