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ICASSP
2008
IEEE
15 years 5 months ago
Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
Chun Jason Xue, Tiantian Liu, Zili Shao, Jingtong ...
IRI
2008
IEEE
15 years 5 months ago
Towards an integrated modeling and simulation framework for freight transportation in metropolitan areas
Freight transportation at distribution nodes such as marine ports, airports and rail yards has been putting tremendous environmental pressure in metropolitan areas. A prerequisite...
Qunzhi Zhou, Amol Bakshi, Viktor K. Prasanna, Rama...
GLOBECOM
2006
IEEE
15 years 5 months ago
Transmit Beamforming with Finite-Rate Feedback for Frequency-Selective Channels
— In this paper, we consider beamforming with finite– rate feedback for frequency–selective channels with decisionfeedback equalization (DFE) at the receiver. Using average ...
Yang-wen Liang, Robert Schober, Wolfgang H. Gersta...
SIGIR
2006
ACM
15 years 5 months ago
Learning to advertise
Content-targeted advertising, the task of automatically associating ads to a Web page, constitutes a key Web monetization strategy nowadays. Further, it introduces new challenging...
Anísio Lacerda, Marco Cristo, Marcos Andr&e...
PVM
2005
Springer
15 years 4 months ago
Cooperative Write-Behind Data Buffering for MPI I/O
Many large-scale production parallel programs often run for a very long time and require data checkpoint periodically to save the state of the computation for program restart and/o...
Wei-keng Liao, Kenin Coloma, Alok N. Choudhary, Le...