Functional verification of complex designs largely relies on the use of simulation in conjunction high-level verification languages (HVL) and test-bench automation (TBA) tools. In...
Program termination verification is a challenging research subject of significant practical importance. While there is already a rich body of literature on this subject, it is sti...
As the density and complexity of FPGA-based designs has increased to 10,000 gates and beyond, the use of high-level design languages (HDLs) is rapidly supplanting schematic entry ...
The HATS project develops a formal method for the design, analysis, and implementation of highly adaptable software systems that are at the same time characterized by a high demand...
The National Institute of Information and Communications Technology (NICT) and Nagoya University have been jointly constructing a large scale database named SHACHI by collecting d...