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TCSV
2008
225views more  TCSV 2008»
15 years 6 months ago
Analysis and Efficient Architecture Design for VC-1 Overlap Smoothing and In-Loop Deblocking Filter
Abstract--In contrast to the macroblock-based in-loop deblocking filters, the filters of VC-1 perform all horizontal edges (for in-loop filtering) or vertical edges (for overlap sm...
Yen-Lin Lee, T. Q. Nguyen
TJS
2002
105views more  TJS 2002»
15 years 5 months ago
Design and Prototype of a Performance Tool Interface for OpenMP
This paper proposes a performance tools interface for OpenMP, similar in spirit to the MPI profiling interface in its intent to define a clear and portable API that makes OpenMP ex...
Bernd Mohr, Allen D. Malony, Sameer Shende, Felix ...
ICCAD
1994
IEEE
131views Hardware» more  ICCAD 1994»
15 years 10 months ago
Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
Hannah Honghua Yang, D. F. Wong
BMCBI
2008
111views more  BMCBI 2008»
15 years 6 months ago
SciDBMaker: new software for computer-aided design of specialized biological databases
Background: The exponential growth of research in molecular biology has brought concomitant proliferation of databases for stocking its findings. A variety of protein sequence dat...
Riadh Hammami, Abdelmajid Zouhir, Karim Naghmouchi...
ANCS
2009
ACM
15 years 4 months ago
Design and performance analysis of a DRAM-based statistics counter array architecture
The problem of maintaining efficiently a large number (say millions) of statistics counters that need to be updated at very high speeds (e.g. 40 Gb/s) has received considerable re...
Haiquan (Chuck) Zhao, Hao Wang, Bill Lin, Jun (Jim...