2945 search results - page 583 / 589 » Designing and Implementing Malicious Hardware |
108
click to vote
ANCS
2007
ACM
15 years 3 months ago
2007
ACM
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
88
Voted
ANCS
2007
ACM
15 years 3 months ago
2007
ACM
Network operators need high-capacity router architectures that can offer scalability, provide throughput and performance guarantees, and maintain packet ordering. However, previou...
114
click to vote
EDCC
2006
Springer
15 years 3 months ago
2006
Springer
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
117
Voted
APCSAC
2001
IEEE
15 years 3 months ago
2001
IEEE
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
87
Voted
ASPLOS
2010
ACM
15 years 3 months ago
2010
ACM
This paper proposes an efficient hardware/software system that significantly enhances software security through diversified replication on multi-cores. Recent studies show that a ...