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ISPA
2007
Springer
15 years 3 months ago
Parallelization Strategies for the Points of Interests Algorithm on the Cell Processor
The Cell processor is a typical example of a heterogeneous multiprocessor-on-chip architecture that uses several levels of parallelism to deliver high performance. Closing the gap ...
Tarik Saidani, Lionel Lacassagne, Samir Bouaziz, T...
DATE
2008
IEEE
81views Hardware» more  DATE 2008»
15 years 4 months ago
Using UML as Front-end for Heterogeneous Software Code Generation Strategies
In this paper we propose an embedded software design flow, which starts from an UML model and provides automatic mapping to other models like Simulink or finite-state machines (FS...
Lisane B. de Brisolara, Marcio F. da S. Oliveira, ...
CODES
2006
IEEE
15 years 3 months ago
Integrated analysis of communicating tasks in MPSoCs
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
Simon Schliecker, Matthias Ivers, Rolf Ernst
P2P
2010
IEEE
135views Communications» more  P2P 2010»
14 years 8 months ago
QoE in Pull Based P2P-TV Systems: Overlay Topology Design Tradeoffs
Abstract—This paper presents a systematic performance analysis of pull P2P video streaming systems for live applications, providing guidelines for the design of the overlay topol...
R. Fortuna, Emilio Leonardi, Marco Mellia, Michela...
SC
2009
ACM
15 years 4 months ago
Bridging parallel and reconfigurable computing with multilevel PGAS and SHMEM+
Reconfigurable computing (RC) systems based on FPGAs are becoming an increasingly attractive solution to building parallel systems of the future. Applications targeting such syste...
Vikas Aggarwal, Alan D. George, K. Yalamanchili, C...