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DAGSTUHL
2007
14 years 11 months ago
Parallelism through Digital Circuit Design
Abstract. Two ways to exploit chips with a very large number of transistors are multicore processors and programmable logic chips. Some data parallel algorithms can be executed eï¬...
John O'Donnell
CEC
2007
IEEE
14 years 11 months ago
Fitness inheritance in evolutionary and multi-objective high-level synthesis
Abstract—The high-level synthesis process allows the automatic design and implementation of digital circuits starting from a behavioral description. Evolutionary algorithms are v...
Christian Pilato, Gianluca Palermo, Antonino Tumeo...
CODES
2005
IEEE
15 years 3 months ago
Automatic network generation for system-on-chip communication design
With growing system complexities, system-level communication design is becoming increasingly important and advanced, network-oriented communication architectures become necessary....
Dongwan Shin, Andreas Gerstlauer, Rainer Döme...
ESTIMEDIA
2003
Springer
15 years 3 months ago
A Component Oriented Simulator for HW/SW Co-Designs
In order to extensively explore design space one has to specify a n a very abstract level. Transforming a specification into a correct implementation is usually an error prone tas...
Alexander Paar, Haitao Du, Nader Bagherzadeh
IESS
2007
Springer
143views Hardware» more  IESS 2007»
15 years 4 months ago
Embedded Software Development in a System-Level Design Flow
Abstract System level design is considered a major approach to tackle the complexity of modern System-on-Chip designs. Embedded software within SoCs is gaining importance as it add...
Gunar Schirner, Gautam Sachdeva, Andreas Gerstlaue...