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ICCD
2008
IEEE
117views Hardware» more  ICCD 2008»
16 years 1 months ago
Two dimensional highly associative level-two cache design
High associativity is important for level-two cache designs [9]. Implementing CAM-based Highly Associative Caches (CAM-HAC), however, is both costly in hardware and exhibits poor s...
Chuanjun Zhang, Bing Xue
ACRI
2008
Springer
15 years 10 months ago
Automatic Design of FPGA Processor for the Backtracking of DNA Sequences Evolution Using Cellular Automata and Genetic Algorithm
In several cases, the DNA sequences of an organism are available in different stages of its evolution and it is desirable to reconstruct the DNA sequence in a previous evolution st...
Georgios Ch. Sirakoulis
IAT
2007
IEEE
15 years 10 months ago
Towards Automated Design of Multi-party Rational Exchange Security Protocols
It is only recently that rational exchange schemes have been considered as an alternative solution to the exchange problem. A rational exchange protocol cannot provide fairness bu...
Almudena Alcaide, Juan M. Estévez-Tapiador,...
ICPP
2006
IEEE
15 years 10 months ago
Designing Multithreaded Algorithms for Breadth-First Search and st-connectivity on the Cray MTA-2
stractions are extensively used to understand and solve challenging computational problems in various scientific and engineering domains. They have particularly gained prominence...
David A. Bader, Kamesh Madduri
RSP
2006
IEEE
120views Control Systems» more  RSP 2006»
15 years 10 months ago
A Case Study of Design Space Exploration for Embedded Multimedia Applications on SoCs
Embedded real-time multimedia applications usually imply data parallel processing. SIMD processors embedded in SOCs are cost-effective to exploit the underlying parallelism. Howev...
Isabelle Hurbain, Corinne Ancourt, François...