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GLVLSI
2003
IEEE
134views VLSI» more  GLVLSI 2003»
16 years 10 days ago
Modeling QCA for area minimization in logic synthesis
Concerned by the wall that Moore’s Law is expected to hit in the next decade, the integrated circuit community is turning to emerging nanotechnologies for continued device impro...
Nadine Gergel, Shana Craft, John Lach
ESCIENCE
2007
IEEE
16 years 1 months ago
Towards a Grid-Enabled Simulation Framework for Nano-CMOS Electronics
The electronics design industry is facing major challenges as transistors continue to decrease in size. The next generation of devices will be so small that the position of indivi...
Liangxiu Han, Asen Asenov, Dave Berry, Campbell Mi...
CODES
1999
IEEE
15 years 11 months ago
A hardware-software cosynthesis technique based on heterogeneous multiprocessor scheduling
In this paper, we propose a fast and simple heuristic for the cosynthesis problem targeting the system-on-chip (SOC) design. The proposed algorithm covers from implementation sele...
Hyunok Oh, Soonhoi Ha
ISSTA
2012
ACM
13 years 9 months ago
Measuring enforcement windows with symbolic trace interpretation: what well-behaved programs say
A static analysis design is sufficient if it can prove the property of interest with an acceptable number of false alarms. Ultimately, the only way to confirm that an analysis d...
Devin Coughlin, Bor-Yuh Evan Chang, Amer Diwan, Je...
ICSE
2007
IEEE-ACM
16 years 7 months ago
Using GUI Run-Time State as Feedback to Generate Test Cases
This paper presents a new automated model-driven technique to generate test cases by using feedback from the execution of a "seed test suite" on an application under tes...
Xun Yuan, Atif M. Memon