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» Designing for Flow in a Complex Activity
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CODES
2006
IEEE
15 years 3 months ago
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
Martijn Coenen, Srinivasan Murali, Andrei Radulesc...
84
Voted
SP
2010
IEEE
210views Security Privacy» more  SP 2010»
15 years 1 months ago
Reconciling Belief and Vulnerability in Information Flow
Abstract—Belief and vulnerability have been proposed recently to quantify information flow in security systems. Both concepts stand as alternatives to the traditional approaches...
Sardaouna Hamadou, Vladimiro Sassone, Catuscia Pal...
BMCBI
2008
117views more  BMCBI 2008»
14 years 9 months ago
RNACompress: Grammar-based compression and informational complexity measurement of RNA secondary structure
Background: With the rapid emergence of RNA databases and newly identified non-coding RNAs, an efficient compression algorithm for RNA sequence and structural information is neede...
Qi Liu, Yu Yang, Chun Chen, Jiajun Bu, Yin Zhang, ...
SIPS
2007
IEEE
15 years 4 months ago
Dynamic Channel Flow Control of Networks-on-Chip Systems for High Buffer Efficiency
System-on-Chip (SoC) designs become more complex nowadays. The communication between each processing element often suffers challenges due to the wiring problem. Networks-on-Chip (...
Sung-Tze Wu, Chih-Hao Chao, I-Chyn Wey, An-Yeu Wu
AAAI
1997
14 years 11 months ago
Complex Goal Criteria and Its Application in Design-to-Criteria Scheduling
Difficult real-time AI problems require a means for expressing multi-dimensional and dynamic goal criteria and a principled model for satisficing to best meet the criteria. In the...
Thomas Wagner, Alan Garvey, Victor R. Lesser