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» Designing for Flow in a Complex Activity
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VISUALIZATION
1992
IEEE
15 years 1 months ago
Display of Scientific Data Structures for Algorithm Visualization
algorithms as networks of modules. The data flow architecture is popular because of the flexibility of mixing calculation modules with display modules, and because of its easy grap...
William L. Hibbard, Charles R. Dyer, Brian E. Paul
CHI
2002
ACM
15 years 10 months ago
Where do web sites come from?: capturing and interacting with design history
To form a deep understanding of the present; we need to find and engage history. We present an informal history capture and retrieval mechanism for collaborative, earlystage infor...
Scott R. Klemmer, Michael Thomsen, Ethan Phelps-Go...
DAC
2006
ACM
15 years 3 months ago
SystemC transaction level models and RTL verification
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
Stuart Swan
DATE
2000
IEEE
132views Hardware» more  DATE 2000»
15 years 2 months ago
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
ASAP
2006
IEEE
119views Hardware» more  ASAP 2006»
14 years 11 months ago
From Bit Level Systolic Arrays to HDTV Processor Chips
The paper starts presents the work initially carried out by Queen's University and RSRE (now Qinetiq) in the development of advanced architectures and microchips based on sys...
John V. McCanny, Roger F. Woods, John G. McWhirter