— A rateless code—i.e., a rate-compatible family of codes—has the property that codewords of the higher rate codes are prefixes of those of the lower rate ones. A perfect fa...
In this paper, we consider the mechanism design version of the fractional variant of the scheduling problem on unrelated machines. We give a lower bound of 2 − 1/n for any fracti...
George Christodoulou, Elias Koutsoupias, Annam&aac...
This paper describes a method how to represent and build a reusable VHDL component. By that component we can, for example, describe a family of the relative VHDL models. To represe...
We develop,in the context of discriminantanalysis,a generalapproachto the designof neuralarchitectures. It consistsin building a neuralnet ‘around’a statistical model family; ...
The GasP family of asynchronous circuits provides controls for simple pipelines, for branching and joining pipelines, for round-robin scatter and gather, for datadependent scatter...