826 search results - page 37 / 166 » Designing for families |
ARVLSI
2001
IEEE
15 years 1 months ago
2001
IEEE
Output Prediction Logic (OPL) is a technique that can be applied to conventional CMOS logic families to obtain considerable speedups. When applied to static CMOS, OPL retains the ...
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CSREAESA
2003
14 years 11 months ago
2003
Most so-called “adiabatic” digital logic circuit families reported in the low-power design literature are actually not truly adiabatic, in that they do not satisfy the general...
ACMIDC
2009
14 years 7 months ago
2009
While supporting family communication has traditionally been a domain of interest for interaction designers, few research initiatives have explicitly investigated remote synchrono...
MICRO
2010
IEEE
14 years 7 months ago
2010
IEEE
We propose an architectural design methodology for designing formally verifiable cache coherence protocols, called Fractal Coherence. Properly designed to be fractal in behavior, t...
ACMIDC
2009
15 years 1 months ago
2009
Informal educational experiences with grandparents and other older adults can be an important component of childrens education, especially in circumstances where high quality educ...