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JCB
2008
81views more  JCB 2008»
15 years 4 months ago
New Constructions of One- and Two-Stage Pooling Designs
The study of gene functions requires a DNA library of high quality, such a library is obtained from a large mount of testing and screening. Pooling design is a very helpful tool f...
Yongxi Cheng, Ding-Zhu Du
DAC
2008
ACM
16 years 5 months ago
Robust chip-level clock tree synthesis for SOC designs
A key problem that arises in System-on-a-Chip (SOC) designs of today is the Chip-level Clock Tree Synthesis (CCTS). CCTS is done by merging all the clock trees belonging to differ...
Anand Rajaram, David Z. Pan
VLSID
2003
IEEE
103views VLSI» more  VLSID 2003»
16 years 4 months ago
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program
In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
CHI
2003
ACM
16 years 4 months ago
Can you see what i hear?: the design and evaluation of a peripheral sound display for the deaf
We developed two visual displays for providing awareness of environmental audio to deaf individuals. Based on fieldwork with deaf and hearing participants, we focused on supportin...
F. Wai-ling Ho-Ching, Jennifer Mankoff, James A. L...
ICDCSW
2007
IEEE
15 years 10 months ago
X3D Multi-user Virtual Environment Platform for Collaborative Spatial Design
It is well known that both space and the spatial organization play an important role in our work and learning environments as well as in everyday life. There is a definite need fo...
Christos Bouras, Ch. Tegos, V. Triglianos, Thrasyv...