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ER
1998
Springer
106views Database» more  ER 1998»
15 years 10 months ago
Chrono: A Conceptual Design Framework for Temporal Entities
Abstract. Database applications are frequently faced with the necessity of representing time varying information and, particularly in the management of information systems, a few k...
Sonia Bergamaschi, Claudio Sartori
CCS
2009
ACM
15 years 9 months ago
On voting machine design for verification and testability
We present an approach for the design and analysis of an electronic voting machine based on a novel combination of formal verification and systematic testing. The system was desig...
Cynthia Sturton, Susmit Jha, Sanjit A. Seshia, Dav...
GLVLSI
2009
IEEE
125views VLSI» more  GLVLSI 2009»
15 years 9 months ago
Spatial and temporal design debug using partial MaxSAT
Design debug remains one of the major bottlenecks in the VLSI design cycle today. Existing automated solutions strive to aid engineers in reducing the debug effort by identifying ...
Yibin Chen, Sean Safarpour, Andreas G. Veneris, Jo...
PATMOS
2000
Springer
15 years 9 months ago
Early Power Estimation for System-on-Chip Designs
Abstract. Reduction of chip packaging and cooling costs for deep sub-micron SystemOn-Chip (SOC) designs is an emerging issue. We present a simulation-based methodology able to real...
Marcello Lajolo, Luciano Lavagno, Matteo Sonza Reo...
ICCAD
1995
IEEE
129views Hardware» more  ICCAD 1995»
15 years 9 months ago
Activity-driven clock design for low power circuits
In this paper we investigate activity-driven clock trees to reduce the dynamic power consumption of synchronous digital CMOS circuits. Sections of an activity-driven clock tree ca...
Gustavo E. Téllez, Amir H. Farrahi, Majid S...