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» Designing hardware with dynamic memory abstraction
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ARC
2006
Springer
201views Hardware» more  ARC 2006»
15 years 1 months ago
Dynamic Partial Reconfigurable FIR Filter Design
Abstract. This paper presents a novel partially reconfigurable FIR filter design that employs dynamic partial reconfiguration. Our scope is to implement a low-power, area-efficient...
Yeong-Jae Oh, Hanho Lee, Chong Ho Lee
74
Voted
SOSP
2005
ACM
15 years 6 months ago
Mondrix: memory isolation for linux using mondriaan memory protection
This paper presents the design and an evaluation of Mondrix, a version of the Linux kernel with Mondriaan Memory Protection (MMP). MMP is a combination of hardware and software th...
Emmett Witchel, Junghwan Rhee, Krste Asanovic
67
Voted
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
15 years 6 months ago
Reliability Support for On-Chip Memories Using Networks-on-Chip
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
Federico Angiolini, David Atienza, Srinivasan Mura...
ISLPED
2006
ACM
109views Hardware» more  ISLPED 2006»
15 years 3 months ago
Power reduction of multiple disks using dynamic cache resizing and speed control
This paper presents an energy-conservation method for multiple disks and their cache memory. Our method periodically resizes the cache memory and controls the rotation speeds unde...
Le Cai, Yung-Hsiang Lu
ISCAS
2006
IEEE
157views Hardware» more  ISCAS 2006»
15 years 3 months ago
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...
Daewook Kim, Manho Kim, Gerald E. Sobelman