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» Designing hardware with dynamic memory abstraction
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DATE
2010
IEEE
202views Hardware» more  DATE 2010»
15 years 2 months ago
FlashPower: A detailed power model for NAND flash memory
Abstract— Flash memory is widely used in consumer electronics products, such as cell-phones and music players, and is increasingly displacing hard disk drives as the primary stor...
Vidyabhushan Mohan, Sudhanva Gurumurthi, Mircea R....
DATE
2002
IEEE
82views Hardware» more  DATE 2002»
15 years 2 months ago
Dynamic Scheduling and Clustering in Symbolic Image Computation
The core computation in BDD-based symbolic synthesis and verification is forming the image and pre-image of sets of states under the transition relation characterizing the sequen...
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
ICC
2000
IEEE
124views Communications» more  ICC 2000»
15 years 2 months ago
A Fast IP Routing Lookup Scheme
Abstract—A major issue in router design for the next generation Internet is the fast IP address lookup mechanism. The existing scheme by Huang et al. performs the IP address look...
Pi-Chung Wang, Yaw-Chung Chen, Chia-Tai Chan
69
Voted
INFOSCALE
2006
ACM
15 years 3 months ago
Scalable hardware accelerator for comparing DNA and protein sequences
Abstract— Comparing genetic sequences is a well-known problem in bioinformatics. Newly determined sequences are being compared to known sequences stored in databases in order to ...
Philippe Faes, Bram Minnaert, Mark Christiaens, Er...
JSA
2007
142views more  JSA 2007»
14 years 9 months ago
Efficient FPGA hardware development: A multi-language approach
This paper presents a multi-language framework to FPGA hardware development which aims to satisfy the dual requirement of high level hardware design and efficient hardware impleme...
Khaled Benkrid, Abdsamad Benkrid, S. Belkacemi