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FPL
2000
Springer
119views Hardware» more  FPL 2000»
15 years 1 months ago
A Self-Reconfigurable Gate Array Architecture
Abstract. This paper presents an innovative architecture for a reconfigurable device that allows single cycle context switching and single cycle random access to the unified on-chi...
Reetinder P. S. Sidhu, Sameer Wadhwa, Alessandro M...
EIT
2008
IEEE
14 years 11 months ago
Design and analysis of efficient reconfigurable wavelet filters
Abstract--Real-time image and multimedia processing applications such as video surveillance and telemedicine can have dynamic requirements of system latency, throughput, and power ...
Amit Pande, Joseph Zambreno
FPL
2008
Springer
122views Hardware» more  FPL 2008»
14 years 11 months ago
Mining Association Rules with systolic trees
Association Rules Mining (ARM) algorithms are designed to find sets of frequently occurring items in large databases. ARM applications have found their way into a variety of field...
Song Sun, Joseph Zambreno
IEEEPACT
2009
IEEE
15 years 4 months ago
Interprocedural Load Elimination for Dynamic Optimization of Parallel Programs
Abstract—Load elimination is a classical compiler transformation that is increasing in importance for multi-core and many-core architectures. The effect of the transformation is ...
Rajkishore Barik, Vivek Sarkar
87
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IWOMP
2009
Springer
15 years 2 months ago
Dynamic Task and Data Placement over NUMA Architectures: An OpenMP Runtime Perspective
Abstract. Exploiting the full computational power of current hierarchical multiprocessor machines requires a very careful distribution of threads and data among the underlying non-...
François Broquedis, Nathalie Furmento, Bric...