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» Designing hardware with dynamic memory abstraction
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ISLPED
2000
ACM
77views Hardware» more  ISLPED 2000»
15 years 2 months ago
A recursive algorithm for low-power memory partitioning
Memory-processor integration o ers new opportunities for reducing the energy of a system. In the case of embedded systems, one solution consists of mapping the most frequently acc...
Luca Benini, Alberto Macii, Massimo Poncino
IJWMC
2007
66views more  IJWMC 2007»
14 years 9 months ago
Grain: a stream cipher for constrained environments
Abstract. A new stream cipher, Grain, is proposed. The design targets hardware environments where gate count, power consumption and memory is very limited. It is based on two shift...
Martin Hell, Thomas Johansson, Willi Meier
72
Voted
DATE
2006
IEEE
93views Hardware» more  DATE 2006»
15 years 3 months ago
Restructuring field layouts for embedded memory systems
In many computer systems with large data computations, the delay of memory access is one of the major performance bottlenecks. In this paper, we propose an enhanced field remappi...
Keoncheol Shin, Jungeun Kim, Seonggun Kim, Hwansoo...
HPCA
1998
IEEE
15 years 1 months ago
PRISM: An Integrated Architecture for Scalable Shared Memory
This paper describes PRISM, a distributed sharedmemory architecture that relies on a tightly integrated hardware and operating system design for scalable and reliable performance....
Kattamuri Ekanadham, Beng-Hong Lim, Pratap Pattnai...
95
Voted
ASAP
2006
IEEE
110views Hardware» more  ASAP 2006»
15 years 3 months ago
Loop Transformation Methodologies for Array-Oriented Memory Management
Abstract – The storage requirements in data-dominant signal processing systems, whose behavior is described by arraybased, loop-organized algorithmic specifications, have an imp...
Florin Balasa, Per Gunnar Kjeldsberg, Martin Palko...