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» Designing hardware with dynamic memory abstraction
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ARCS
2006
Springer
15 years 1 months ago
An Operating System Infrastructure for Fault-Tolerant Reconfigurable Networks
Abstract. Dynamic hardware reconfiguration is becoming a key technology in embedded system design that offers among others new potentials in dependable computing. To make system de...
Dirk Koch, Thilo Streichert, Steffen Dittrich, Chr...
ERSA
2010
199views Hardware» more  ERSA 2010»
14 years 7 months ago
Reconfigurable Sparse Matrix-Vector Multiplication on FPGAs
Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for sp...
Russell Tessier, Salma Mirza, J. Blair Perot
ICC
2011
IEEE
269views Communications» more  ICC 2011»
13 years 9 months ago
Experimental Evaluation of Memory Management in Content-Centric Networking
Abstract—Content-Centric Networking is a new communication architecture that rethinks the Internet communication model, designed for point-to-point connections between hosts, and...
Giovanna Carofiglio, Vinicius Gehlen, Diego Perino
ISCAS
2007
IEEE
115views Hardware» more  ISCAS 2007»
15 years 4 months ago
Design of Multi-Directional Multi-Scroll Chaotic Attractors Based on Fractional Differential Systems
Abstract— A novel approach is proposed for generating multidirectional multi-scroll chaotic attractors from the fractional differential systems, including one-directional (1-D) n...
Weihua Deng, Jinhu Lu
ISCA
1993
IEEE
125views Hardware» more  ISCA 1993»
15 years 1 months ago
Evaluation of Mechanisms for Fine-Grained Parallel Programs in the J-Machine and the CM-5
er uses an abstract machine approach to compare the mechanisms of two parallel machines: the J-Machine and the CM-5. High-level parallel programs are translated by a single optimi...
Ellen Spertus, Seth Copen Goldstein, Klaus E. Scha...