453 search results - page 41 / 91 » Designing hardware with dynamic memory abstraction |
CODES
2003
IEEE
15 years 3 months ago
2003
IEEE
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....
ICCAD
2004
IEEE
15 years 6 months ago
2004
IEEE
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
VLSID
2001
IEEE
15 years 10 months ago
2001
IEEE
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
ICPP
2003
IEEE
15 years 3 months ago
2003
IEEE
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
CASES
2004
ACM
15 years 1 months ago
2004
ACM
The tremendous growth of system memories has increased the capacities and capabilities of memory-resident embedded databases, yet current embedded databases need to be tuned in or...