453 search results - page 44 / 91 » Designing hardware with dynamic memory abstraction |
125
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JPDC
2006
14 years 9 months ago
2006
Irregular parallel algorithms pose a significant challenge for achieving high performance because of the difficulty predicting memory access patterns or execution paths. Within an...
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
Abstract-- A complementary ferroelectriccapacitor (CFC) logic-circuit style is proposed for a compact and standby-power-free content-addressable memory (CAM). Since the use of the ...
103
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ASPDAC
2001
ACM
15 years 1 months ago
2001
ACM
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
101
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MICRO
2010
IEEE
14 years 7 months ago
2010
IEEE
Abstract--Many shared-memory parallel systems use lockbased synchronization mechanisms to provide mutual exclusion or reader-writer access to memory locations. Software locks are i...
ISCAS
2008
IEEE
15 years 4 months ago
2008
IEEE
Abstract— This paper presents circuits that enable dynamic voltage and frequency scaling (DVFS) for finegrained chip multi-processors to reduce both dynamic and leakage power di...