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» Designing hardware with dynamic memory abstraction
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DATE
2010
IEEE
261views Hardware» more  DATE 2010»
15 years 2 months ago
Evaluation and design exploration of solar harvested-energy prediction algorithm
Abstract—To respond to variations in solar energy, harvestedenergy prediction is essential to harvested-energy management approaches. The effectiveness of such approaches is depe...
Mustafa Imran Ali, Bashir M. Al-Hashimi, Joaqu&iac...
MICRO
2007
IEEE
144views Hardware» more  MICRO 2007»
15 years 4 months ago
Process Variation Tolerant 3T1D-Based Cache Architectures
Process variations will greatly impact the stability, leakage power consumption, and performance of future microprocessors. These variations are especially detrimental to 6T SRAM ...
Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David Bro...
EMSOFT
2001
Springer
15 years 2 months ago
Some Synchronization Issues When Designing Embedded Systems from Components
Abstract This paper is sort of a confession. Issues of synchrony, asynchrony, and synchronization, arise frequently in designing embedded systems from components, like everyone I k...
Albert Benveniste
MICRO
2010
IEEE
119views Hardware» more  MICRO 2010»
14 years 7 months ago
A Predictive Model for Dynamic Microarchitectural Adaptivity Control
Abstract--Adaptive microarchitectures are a promising solution for designing high-performance, power-efficient microprocessors. They offer the ability to tailor computational resou...
Christophe Dubach, Timothy M. Jones, Edwin V. Boni...
TVLSI
2010
14 years 4 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...