453 search results - page 51 / 91 » Designing hardware with dynamic memory abstraction |
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
System level synthesis is widely seen as the solution for closing the productivity gap in system design. High level system models are used in system level design for early design ...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—Multiple-voltage is an effective dynamic power reduction design technique. Recent research has shown that testing for resistive bridging faults in such designs requires ...
COMPUTER
2000
14 years 9 months ago
2000
Processor and memory technology trends portend a continual increase in the relative cost of accessing main memory. Machine designers have tried to mitigate the effect of this tren...