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» Designing hardware with dynamic memory abstraction
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PASTE
2004
ACM
15 years 3 months ago
Validation of assembler programs for DSPs: a static analyzer
Digital Signal Processors are widely used in critical embedded systems to pilot low-level, often critical functionalities. We describe a static analyzer based on abstract interpre...
Matthieu Martel
HICSS
1995
IEEE
128views Biometrics» more  HICSS 1995»
15 years 1 months ago
Instruction Level Parallelism
Abstract. We reexamine the limits of parallelism available in programs, using runtime reconstruction of program data-flow graphs. While limits of parallelism have been examined in...
MICRO
2009
IEEE
124views Hardware» more  MICRO 2009»
15 years 4 months ago
ZerehCache: armoring cache architectures in high defect density technologies
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
84
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IJCNN
2006
IEEE
15 years 3 months ago
Reinforcement Learning Control for Biped Robot Walking on Uneven Surfaces
— Biped robots based on the concept of (passive) dynamic walking are far simpler than the traditional fullycontrolled walking robots, while achieving a more natural gait and cons...
Shouyi Wang, Jelmer Braaksma, Robert Babuska, Daan...
CODES
2003
IEEE
15 years 3 months ago
RTOS scheduling in transaction level models
the level of abstraction in system design promises to enable faster exploration of the design space at early stages. While scheduling decision for embedded software has great impa...
Haobo Yu, Andreas Gerstlauer, Daniel Gajski