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» Designing hardware with dynamic memory abstraction
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DATE
2009
IEEE
101views Hardware» more  DATE 2009»
15 years 4 months ago
A monitor interconnect and support subsystem for multicore processors
Abstract— In many current SoCs, the architectural interface to onchip monitors is ad hoc and inefficient. In this paper, a new architectural approach which advocates the use of a...
Sailaja Madduri, Ramakrishna Vadlamani, Wayne Burl...
DDECS
2008
IEEE
137views Hardware» more  DDECS 2008»
15 years 4 months ago
Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip
Abstract—In Network-on-Chip (NoC) application design, coreto-node mapping is an important but intractable optimization problem. In the paper, we use simulated annealing to tackle...
Zhonghai Lu, Lei Xia, Axel Jantsch
MPC
2010
Springer
181views Mathematics» more  MPC 2010»
15 years 2 months ago
Process Algebras for Collective Dynamics
d Abstract) Jane Hillston Laboratory for Foundations of Computer Science, The University of Edinburgh, Scotland Quantitative Analysis Stochastic process algebras extend classical p...
Jane Hillston
CAISE
2005
Springer
15 years 3 months ago
Dynamic Load Balancing of Virtualized Database Services Using Hints and Load Forecasting
Abstract. Future database application systems will be designed as Service Oriented Architectures (SOAs), in contrast to today’s monolithic architectures. The decomposition in man...
Daniel Gmach, Stefan Krompass, Stefan Seltzsam, Ma...
IEEEPACT
2009
IEEE
15 years 4 months ago
Quantifying the Potential of Program Analysis Peripherals
Abstract—As programmers are asked to manage more complicated parallel machines, it is likely that they will become increasingly dependent on tools such as multi-threaded data rac...
Mohit Tiwari, Shashidhar Mysore, Timothy Sherwood