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» Designing hardware with dynamic memory abstraction
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CGO
2009
IEEE
15 years 4 months ago
Scenario Based Optimization: A Framework for Statically Enabling Online Optimizations
Abstract—Online optimization allows the continuous restructuring and adaptation of an executing application using live information about its execution environment. The further ad...
Jason Mars, Robert Hundt
ISCAS
2007
IEEE
94views Hardware» more  ISCAS 2007»
15 years 3 months ago
Fundamental Bounds on Power Reduction during Data-Retention in Standby SRAM
Abstract— We study leakage-power reduction in standby random access memories (SRAMs) during data-retention. An SRAM cell requires a minimum critical supply voltage (DRV) above wh...
Animesh Kumar, Huifang Qin, Prakash Ishwar, Jan M....
TRETS
2010
142views more  TRETS 2010»
14 years 8 months ago
Performance Analysis Framework for High-Level Language Applications in Reconfigurable Computing
s, and abstractions, typically enabling faster development times than with traditional Hardware ion Languages (HDLs). However, programming at a higher level of abstraction is typic...
John Curreri, Seth Koehler, Alan D. George, Brian ...
PDCAT
2009
Springer
15 years 4 months ago
CheCUDA: A Checkpoint/Restart Tool for CUDA Applications
Abstract—In this paper, a tool named CheCUDA is designed to checkpoint CUDA applications that use GPUs as accelerators. As existing checkpoint/restart implementations do not supp...
Hiroyuki Takizawa, Katsuto Sato, Kazuhiko Komatsu,...
FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
15 years 3 months ago
A Scalable FPGA-based Multiprocessor
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...