Sciweavers

453 search results - page 77 / 91
» Designing hardware with dynamic memory abstraction
Sort
View
ICCAD
2001
IEEE
201views Hardware» more  ICCAD 2001»
15 years 6 months ago
An Integrated Data Path Optimization for Low Power Based on Network Flow Method
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu
MICRO
2010
IEEE
170views Hardware» more  MICRO 2010»
14 years 7 months ago
Tolerating Concurrency Bugs Using Transactions as Lifeguards
Abstract--Parallel programming is hard, because it is impractical to test all possible thread interleavings. One promising approach to improve a multi-threaded program's relia...
Jie Yu, Satish Narayanasamy
EUROPAR
2009
Springer
15 years 1 months ago
StarPU: A Unified Platform for Task Scheduling on Heterogeneous Multicore Architectures
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...
Cédric Augonnet, Samuel Thibault, Raymond N...
SIGCSE
2004
ACM
141views Education» more  SIGCSE 2004»
15 years 3 months ago
Running on the bare metal with GeekOS
Undergraduate operating systems courses are generally taught e of two approaches: abstract or concrete. In the approach, students learn the concepts underlying operating systems t...
David Hovemeyer, Jeffrey K. Hollingsworth, Bobby B...
106
Voted
DCOSS
2008
Springer
14 years 11 months ago
SAKE: Software Attestation for Key Establishment in Sensor Networks
Abstract. This paper presents a protocol called SAKE (Software Attestation for Key Establishment), for establishing a shared key between any two neighboring nodes of a sensor netwo...
Arvind Seshadri, Mark Luk, Adrian Perrig