Sciweavers

453 search results - page 84 / 91
» Designing hardware with dynamic memory abstraction
Sort
View
OSDI
1996
ACM
14 years 11 months ago
Automatic Compiler-Inserted I/O Prefetching for Out-of-Core Applications
Current operating systems offer poor performance when a numeric application's working set does not fit in main memory. As a result, programmers who wish to solve "out-of...
Todd C. Mowry, Angela K. Demke, Orran Krieger
TKDE
2008
137views more  TKDE 2008»
14 years 9 months ago
GossipTrust for Fast Reputation Aggregation in Peer-to-Peer Networks
Abstract-- In peer-to-peer (P2P) networks, reputation aggregation and peer ranking are the most time-consuming and spacedemanding operations. This paper proposes a gossip-based rep...
Runfang Zhou, Kai Hwang, Min Cai
ICCAD
2005
IEEE
114views Hardware» more  ICCAD 2005»
15 years 6 months ago
Double-gate SOI devices for low-power and high-performance applications
: Double-Gate (DG) transistors have emerged as promising devices for nano-scale circuits due to their better scalability compared to bulk CMOS. Among the various types of DG device...
Kaushik Roy, Hamid Mahmoodi-Meimand, Saibal Mukhop...
ISCA
2006
IEEE
169views Hardware» more  ISCA 2006»
15 years 3 months ago
Balanced Cache: Reducing Conflict Misses of Direct-Mapped Caches
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...
Chuanjun Zhang
MICRO
2005
IEEE
113views Hardware» more  MICRO 2005»
15 years 3 months ago
Thermal Management of On-Chip Caches Through Power Density Minimization
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I....