Sciweavers

27 search results - page 6 / 6
» Designing real-time H.264 decoders with dataflow architectur...
Sort
View
ISCAS
2007
IEEE
136views Hardware» more  ISCAS 2007»
14 years 16 days ago
Flexible Low Power Probability Density Estimation Unit For Speech Recognition
— This paper describes the hardware architecture for a flexible probability density estimation unit to be used in a Large Vocabulary Speech Recognition System, and targeted for m...
Ullas Pazhayaveetil, Dhruba Chandra, Paul Franzon
CODES
2008
IEEE
14 years 22 days ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...