Sciweavers

1226 search results - page 108 / 246
» Designing systems-on-chip using cores
Sort
View
ISCAS
2006
IEEE
80views Hardware» more  ISCAS 2006»
15 years 7 months ago
A fast state-space algorithm to estimate harmonic distortion in fully differential weakly nonlinear Gm-C filters
In this paper, we present a fast algorithm to derive the iiiharmonic distortion in fully balanced Gm- C filters. It is based on Vi i state-space modeling and decomposition of the f...
Zhaonian Zhang, Abdullah Celik, Paul Sotiriadis
SGAI
2004
Springer
15 years 6 months ago
Managing ontology versions with a distributed blackboard architecture
Ontology versioning deals with the management of ontology changes, including the evaluation of the consequences arising from these changes. We describe a distributed, “pluggable...
Ernesto Compatangelo, Wamberto Vasconcelos, Bruce ...
INFOCOM
2003
IEEE
15 years 6 months ago
Fast Incremental Updates for Pipelined Forwarding Engines
— Pipelined ASIC architectures are increasingly being used in forwarding engines for high speed IP routers. We explore optimization issues in the design of memory-efficient data...
Anindya Basu, Girija J. Narlikar
FPGA
1998
ACM
194views FPGA» more  FPGA 1998»
15 years 5 months ago
FPGA-Based Sonar Processing
This paper presents the application of time-delay sonar beamforming and discusses a multi-board FPGA system for performing several variations of this beamforming method in real-ti...
Paul Graham, Brent E. Nelson
ISCAS
1993
IEEE
125views Hardware» more  ISCAS 1993»
15 years 5 months ago
A VLSI Implementation of a Cascade Viterbi Decoder with Traceback
- A novel VLSI implementation of the Viterbi algorithm based on a cascade architecture is presented. Survivor sequence memory management is implemented using a new single read poin...
Gennady Feygin, Paul Chow, P. Glenn Gulak, John Ch...