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» Designing systems-on-chip using cores
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ASPLOS
2008
ACM
15 years 3 months ago
Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors
Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as th...
Chinnakrishnan S. Ballapuram, Ahmad Sharif, Hsien-...
75
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ICCAD
2008
IEEE
99views Hardware» more  ICCAD 2008»
15 years 10 months ago
Evaluation of voltage interpolation to address process variations
Abstract— Post-fabrication tuning provides a promising design approach to mitigate the performance and power overheads of process variation in advanced fabrication technologies. ...
Kevin Brownell, Gu-Yeon Wei, David Brooks
IWOMP
2007
Springer
15 years 7 months ago
Supporting OpenMP on Cell
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...
ISCA
2009
IEEE
158views Hardware» more  ISCA 2009»
15 years 8 months ago
Boosting single-thread performance in multi-core systems through fine-grain multi-threading
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, single thread performance remains of paramount importance since some applicatio...
Carlos Madriles, Pedro López, Josep M. Codi...
PASTE
2010
ACM
15 years 6 months ago
Opportunities for concurrent dynamic analysis with explicit inter-core communication
Multicore is now the dominant processor trend, and the number of cores is rapidly increasing. The paradigm shift to multicore forces the redesign of the software stack, which incl...
Jungwoo Ha, Stephen P. Crago