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DAC
1997
ACM
15 years 5 months ago
Hardware/Software Co-Simulation in a VHDL-Based Test Bench Approach
Novel test bench techniques are required to cope with a functional test complexity which is predicted to grow much more strongly than design complexity. Our test bench approach at...
Matthias Bauer, Wolfgang Ecker
EUROSSC
2006
Springer
15 years 5 months ago
Toward Wide Area Interaction with Ubiquitous Computing Environments
Despite many years of ubiquitous computing (ubicomp) middleware research, deployment of such systems has not been widespread. We suggest this is in part because we lack a shared mo...
Michael Blackstock, Rodger Lea, Charles Krasic
FMCAD
2000
Springer
15 years 5 months ago
Model Checking Synchronous Timing Diagrams
Abstract. Model checking is an automated approach to the formal verification of hardware and software. To allow model checking tools to be used by the hardware or software designer...
Nina Amla, E. Allen Emerson, Robert P. Kurshan, Ke...
ASPDAC
2005
ACM
132views Hardware» more  ASPDAC 2005»
15 years 3 months ago
Automatic synthesis and scheduling of multirate DSP algorithms
- To date, most high-level synthesis systems do not automatically solve present design problems, such as those related to timing associated with the physical implementation of mult...
Ying Yi, Mark Milward, Sami Khawam, Ioannis Nousia...
JUCS
2008
138views more  JUCS 2008»
15 years 1 months ago
A Lightweight and Extensible AspectJ Implementation
Abstract: Extending AspectJ to experiment with new language features can be cumbersome, even with an extensible implementation. Often, a language designer only needs a rapid protot...
Rodolfo Toledo, Éric Tanter